As a Senior Engineer for Digital Layout, you will be for the quality of the physical design and the fulfillment of the required KPIs.
Responsibilities
In your new role you will:
Own the Physical Design work packages: Floor-planning, Placement, CTS, Routing, Sign-Off – including planning, effort estimation and implementation
Work together with the physical design verification and synthesis owners to reach the timing closure and signoff criteria as planned
Interface with top level, digital and analog design teams both local and from other sites to ensure a smooth integration at top
Implement, update and improve the scripts used in the Physical Design flow
Requirements
As a driven and results-oriented individual, you excel in environments where ambitious goals and top-quality product development converge. You consistently deliver high-quality results, fulfilling your tasks with dedication and precision. As a team player, you possess a unique ability to think and act cooperatively, establishing successful collaborations with other teams within Infineon. Your cooperative mindset enables you to navigate complex projects with ease, fostering a culture of mutual support and driving collective success.
You are best equipped for this task if you have:
University Degree in Electrical Engineering or similar field. Master’s degree is an advantage
Proven experience in implementing complex SoC designsfromRTL to GDS, preferred in an UNIX environment
Expertise in floor-planning, power, CTS, place and route and physical verification with knowledge of synthesis and timing analysis
Skills acquired by previous usage of various CAD tools like: Innovus, ICC/ICC2, Calibre, StarRC. Primetime and Design Compiler are considered a plus
Knowledge of bonding diagrams generation
Very good scripting knowledge using TCL, Python and/or Perl
Previous experience with physical design work-packages planning (including effort estimation) and risk management
Very good communication skills and fluency in English
