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Digital Layout Engineer

ID: von_90042630
Full time
Bucharest
Middle
05-05-2023
Employer Profile

Semiconductors

Responsibilities

There are lots of new techniques and methods you will learn and apply. A friendly and supporting team will help in whatever you need!

If all this already put a smile in your face, just take a look in what you will do:

  • Be in charge of the area estimation, floor planning, power routing, CTS, timing-driven, shielding, optimization, timing ECOs, physical verification (DRC, ERC, LVS, ESD, etc.), as well power analysis (EM / IR-Drop) and tape-out layout sign-off.
  • Develop scripts and methods for design automation and cycle time reduction.
  • Interact with synthesis, STA, and top-level responsible people within the product development team, as well as with the local project managers.
  • Be in charge of optimization of chip and module areas.
  • Coordinate layout deliveries within the project (block-level or digital on top).
Requirements

You don´t need to fly, pass across walls, or breathe underwater, we accept every other superpower like a structured, thorough, and results-oriented work style, team spirit, incredible communication skills, and, of course, a hands-on attitude.

Besides those, is also important:

  • Degree in Electrical Engineering, Computer Science or Automation
  • At least 3 years of experience in a similar position
  • Knowledge of fundamental semiconductor principles and operation
  • Knowledge of timing principles and their application in semiconductor designs.
  • Experience with SoC practices (for example, multiple voltages and clock domains, integration of mixed-signal IPs, and I/O integration)
  • Knowledge of DfT/DfM (Design for Testability/Design for Manufacturing) principles and Synthesis and STA is a plus.
  • Good English language knowledge (both written and spoken).
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