The company has been leading the way in semiconductor development, taking chips from conception to market readiness since its establishment in 2005. As they aim to expand and enhance their expertise, an exciting opportunity has emerged for the establishment of a new team dedicated to memory applications. We are in search of a talented and passionate individual to step into an expert role on Functional Verification within a new team. This position will be instrumental in shaping the growth and success of the team, offering the opportunity to contribute expertise and drive forward our commitment to advancing the semiconductor industry.
Job Description
As a Senior Staff Engineer for Functional Verification, you will be part of a verification team utilizing leading-edge verification tools and methodologies to enable the functional verification of large, and complex memory devices.
Employer Profile
semiconductors
Responsibilities
In your new role you will:
Design self-checking test benches using modern verification techniques
Implement functional coverage and assertions using System Verilog and UVM
Develop test and functional coverage plans based on device specifications
Analyze and debug simulation failures, as well as analyze functional coverage results to guarantee zero defect outcomes
Lead and mentor verification teams, as part of a project
Be responsible for the verification of post silicon verificationanddebug
Requirements
Your Profile
As a driven and results-oriented individual, you excel in environments where ambitious goals and top-quality product development converge. You consistently deliver high-quality results, fulfilling your tasks with dedication and precision. As a team player, you possess a unique ability to think and act cooperatively, establishing successful collaborations with other teams within the company. Your cooperative mindset enables you to navigate complex projects with ease, fostering a culture of mutual support and driving collective success.
You are best equipped for this task if you have:
University Degree in Electronics Engineering or similar or equivalent degree
At least 7 years of project experience in IC verification. Experience with constrained-random, coverage driven verification environments is a plus
Experience developing and working with verification languages, such as System Verilog, and verification methodologies such as OVM, UVM
A solid understanding of verification concepts and experience designing class-based test benches
Knowledge and experience in C coding, OOP, Power aware, and gate level simulation
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